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HD74LV2G123A
Retriggerable Monostable Multivibrator
REJ03D0098-0300Z (Previous ADE-205-352B (Z)) Rev.3.00 Sep.30.2003
Description
The HD74LV2G123A features output pulse duration control by three methods. In the first method, the A input is low and the B input goes high. In the second method, the B input is high and the A input goes low. In the third method, the A input is low, the B input is high, and the clear (CLR) input goes high. The basic pulse duration is programmed by selecting external resistance and capacitance values. The external timing capacitor must be connected between Cext and Rext/Cext (positive) and an external resistor connected between Rext/Cext and VCC. To obtain variable pulse durations, connect an external variable resistance between Rext/Cext and VCC. Once triggered, the basic pulse duration can be extended by retriggering the gated low-level active (A) or high-level active (B) input. Pulse duration can be reduced by taking CLR low. The output pulse equation is simply : tWQ = Cext * Rext. Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the battery life.
Features
* The basic gate function is lined up as Renesas uni logic series. * Supplied on emboss taping for high-speed automatic mounting. * Electrical characteristics equivalent to the HD74LV123A Supply voltage range : 1.65 to 5.5 V Operating temperature range : -40 to +85C * All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max.) = 5.5 V (@VCC = 0 V) * Output current 6 mA (@VCC = 3.0 V to 3.6 V), 12 mA (@VCC = 4.5 V to 5.5 V) * All the logical input has hysteresis voltage for the slow transition. * Ordering Information
Part Name Package Type Package Code TTP-8DBV Package Abbreviation US Taping Abbreviation (Quantity) E (3,000 pcs/reel)
HD74LV2G123AUSE SSOP-8 pin
Rev.3.00, Sep.30.2003, page 1 of 18
HD74LV2G123A
Outline and Article Indication
* HD74LV2G123A
Index band Lot No.
YMW L23
SSOP-8 Marking
Y : Year code (the last digit of year) M : Month code W : Week code
Function Table
Inputs CLR L H H H H H : High level L : Low level X : Immaterial : Low to high transition : High to low transition : High level pulse A X H X L L B X X L H H L L L Output Q
Rev.3.00, Sep.30.2003, page 2 of 18
HD74LV2G123A
Pin Arrangement
A
1
8
VCC
B
2
7
Rext / Cext
CLR
3
6
Cext
GND
4
5
Q
(Top view)
Absolute Maximum Ratings
Item Supply voltage range Input voltage range *1 Output voltage range Input clamp current Output clamp current Continuous output current Continuous current through VCC or GND Maximum power dissipation *3 at Ta = 25C (in still air) Storage temperature Notes:
*1, 2
Symbol VCC VI VO IIK IOK IO ICC or IGND PT Tstg
Ratings -0.5 to 7.0 -0.5 to 7.0 -0.5 to VCC + 0.5 -0.5 to 7.0 -20 50 25 50 200 -65 to 150
Unit V V V mA mA mA mA mW C
Test Conditions
Output : H or L VCC : OFF VI < 0 VO < 0 or VO > VCC VO = 0 to VCC
The absolute maximum ratings are values, which must not individually be exceeded, and furthermore no two of which may be realized at the same time. 1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The maximum package power dissipation was calculated using a junction temperature of 150C.
Rev.3.00, Sep.30.2003, page 3 of 18
HD74LV2G123A
Recommended Operating Conditions
Item Supply voltage range Input voltage range Output voltage range Output current Symbol VCC VI VO IOH Min 1.65 0 0 -- -- -- -- IOL -- -- -- -- Input transition rise or fall rate t / v 0 0 0 0 External timing resistance External capacitance Supply transition rise rate Rext Cext t / VCC 5 1 -- 1 -40 Typ -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Max 5.5 5.5 VCC -1 -2 -6 -12 1 2 6 12 300 200 100 20 -- -- F ms / V C -- 85 k ns / V Unit V V V mA
VCC = 1.65 to 1.95 V
Conditions
VCC = 2.3 to 2.7 V VCC = 3.0 to 3.6 V VCC = 4.5 to 5.5 V
VCC = 1.65 to 1.95 V
VCC = 2.3 to 2.7 V VCC = 3.0 to 3.6 V VCC = 4.5 to 5.5 V
VCC = 1.65 to 1.95 V
VCC = 2.3 to 2.7 V VCC = 3.0 to 3.6 V VCC = 4.5 to 5.5 V
VCC = 1.65 to 1.95 V
VCC 2.3 V
Unlimited --
Operating free-air temperature Ta
Note: Unused or floating inputs must be held high or low.
Rev.3.00, Sep.30.2003, page 4 of 18
HD74LV2G123A
Logic Diagram
Rext/ Cext
Cext
A
B Q Q
CLR CLR
Rev.3.00, Sep.30.2003, page 5 of 18
HD74LV2G123A
Electrical Characteristic
* Ta = -40 to 85C
Item Input voltage Symbol VCC (V) * VIH Min VCCx0.7 VCCx0.7 VCCx0.7 -- -- -- -- -- -- -- VCC-0.1 1.4 2.0 2.48 3.8 -- -- -- -- -- -- -- -- -- -- -- -- -- -- Typ Max -- -- -- -- VCCx0.25 VCCx0.3 VCCx0.3 VCCx0.3 -- -- -- -- -- -- -- -- -- 0.1 0.3 0.4 0.44 0.55 1 2.5 10 220 280 650 975 5 -- A pF
VIN or VO = 0 to 5.5 V
Unit V
Test condition
1.65 to 1.95 VCCx0.75 -- 2.3 to 2.7 3.0 to 3.6 4.5 to 5.5 -- -- -- -- -- -- -- 0.25 0.30 0.35 0.45 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 2.5
VIL
1.65 to 1.95 -- 2.3 to 2.7 3.0 to 3.6 4.5 to 5.5
Hysteresis voltage
VH
1.8 2.5 3.3 5.0
V
VT+ - VT-
Output voltage
VOH
Min to Max 1.65 2.3 3.0 4.5
V
IOH = -50 A IOH = -1 mA IOH = -2 mA IOH = -6 mA IOH = -12 mA IOL = 50 A IOL = 1 mA IOL = 2 mA IOL = 6 mA IOL = 12 mA
VOL
Min to Max 1.65 2.3 3.0 4.5
Input current Input current Rext / Cext Quiescent supply current Active state supply current
IIN IIN ICC ICC
0 to 5.5 5.5 5.5 2.3 3.0 4.5 5.5
A A A A
VIN = 5.5 V or GND VIN = VCC or GND VIN = VCC or GND, IO = 0 VIN = VCC or GND Rext / Cext = 0.5VCC
Output leakage current IOFF Input capacitance CIN
0 3.3
VIN = VCC or GND
Note: For conditions shown as Min or Max, use the appropriate values under recommended operating conditions.
Rev.3.00, Sep.30.2003, page 6 of 18
HD74LV2G123A
Switching Characteristics
* VCC = 1.8 0.15 V
Item Symbol Ta = 25C Min Propagation delay time Enable time Disable time tPLH tPHL tZH tZL tHZ tLZ -- -- -- -- -- -- -- 90 0.9 Pulse width Retrigger time tw trr 7.0 -- -- Typ 22.5 28.0 16.0 20.0 21.5 29.0 315 100 1.0 -- 150 2.5 Max 67.0 78.0 48.5 60.0 64.0 80.0 650 110 1.1 -- -- --
Ta = -40 to 85C
Min 1.0 1.0 1.0 1.0 1.0 1.0 -- 90 0.9 8.0 -- --
Max 72.0 82.0 54.0 66.0 69.5 84.5 800 110 1.1 -- -- --
Unit Test FROM Conditions (Input) ns ns ns ns s ms ns ns s CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CLR A or B
TO (Output) Q Q
CLR Q (Trigger)
Output pulse width twQ
CL = 50 pF, Cext = 28 pF, Rext = 5 k CL = 50 pF, Cext = 0.01 F, Rext = 10 k CL = 50 pF, Cext = 0.1 F, Rext = 10 k A, B or CLR A or B (Rext = 5 k, Cext = 100 pF) A or B (Rext = 5 k, Cext = 0.01 F)
Rev.3.00, Sep.30.2003, page 7 of 18
HD74LV2G123A
Switching Characteristics (cont)
* VCC = 2.5 0.2 V
Item Symbol Ta = 25C Min Propagation delay time Enable time Disable time tPLH tPHL tZH tZL tHZ tLZ -- -- -- -- -- -- -- 90 0.9 Pulse width Retrigger time tw trr 6.0 -- -- Typ 13.5 16.0 11.0 13.0 14.0 16.0 170 100 1.0 -- 40 1.5 Max 31.4 36.0 25.0 32.8 33.4 38.0 260 110 1.1 -- -- --
Ta = -40 to 85C
Min 1.0 1.0 1.0 1.0 1.0 1.0 -- 90 0.9 6.5 -- --
Max 37.0 42.0 29.5 34.5 39.0 44.0 320 110 1.1 -- -- --
Unit Test FROM Conditions (Input) ns ns ns ns s ms ns ns s CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CLR A or B
TO (Output) Q Q
CLR Q (Trigger)
Output pulse width twQ
CL = 50 pF, Cext = 28 pF, Rext = 2 k CL = 50 pF, Cext = 0.01 F, Rext = 10 k CL = 50 pF, Cext = 0.1 F, Rext = 10 k A, B or CLR A or B (Rext = 1 k, Cext = 100 pF) A or B (Rext = 1 k, Cext = 0.01 F)
Rev.3.00, Sep.30.2003, page 8 of 18
HD74LV2G123A
Switching Characteristics (cont)
* VCC = 3.3 0.3 V
Item Symbol Ta = 25C Min Propagation delay time Enable time Disable time tPLH tPHL tZH tZL tHZ tLZ -- -- -- -- -- -- -- 90 0.9 Pulse width Retrigger time tw trr 5.0 -- -- Typ 9.7 11.5 8.0 9.5 9.9 11.5 150 100 1.0 -- 30 1.2 Max 20.6 24.1 15.8 19.3 22.4 25.9 240 110 1.1 -- -- --
Ta = -40 to 85C
Min 1.0 1.0 1.0 1.0 1.0 1.0 -- 90 0.9 5.0 -- --
Max 24.0 27.5 18.5 22.0 26.0 29.5 300 110 1.1 -- -- --
Unit Test FROM Conditions (Input) ns ns ns ns s ms ns ns s CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CLR A or B
TO (Output) Q Q
CLR Q (Trigger)
Output pulse width twQ
CL = 50 pF, Cext = 28 pF, Rext = 2 k CL = 50 pF, Cext = 0.01 F, Rext = 10 k CL = 50 pF, Cext = 0.1 F, Rext = 10 k A, B or CLR A or B (Rext = 1 k, Cext = 100 pF) A or B (Rext = 1 k, Cext = 0.01 F)
Rev.3.00, Sep.30.2003, page 9 of 18
HD74LV2G123A
Switching Characteristics (cont)
* VCC = 5.0 0.5 V
Item Symbol Ta = 25C Min Propagation delay time Enable time Disable time tPLH tPHL tZH tZL tHZ tLZ -- -- -- -- -- -- -- 90 0.9 Pulse width Retrigger time tw trr 5.0 -- -- Typ 7.3 8.5 5.9 7.5 7.3 8.7 140 100 1.0 -- 20 0.95 Max 12.0 14.0 9.4 11.4 12.9 14.9 200 110 1.1 -- -- --
Ta = -40 to 85C
Min 1.0 1.0 1.0 1.0 1.0 1.0 -- 90 0.9 5.0 -- --
Max 14.0 16.0 11.0 13.0 15.0 17.0 240 110 1.1 -- -- --
Unit Test FROM Conditions (Input) ns ns ns ns s ms ns ns s CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CLR A or B
TO (Output) Q Q
CLR Q (Trigger)
Output pulse width twQ
CL = 50 pF, Cext = 28 pF, Rext = 2 k CL = 50 pF, Cext = 0.01 F, Rext = 10 k CL = 50 pF, Cext = 0.1 F, Rext = 10 k A, B or CLR A or B (Rext = 1 k, Cext = 100 pF) A or B (Rext = 1 k, Cext = 0.01 F)
Operating Characteristics
* CL = 50 pF
Item Symbol VCC (V) Ta = 25C Min Power dissipation capacitance CPD 3.3 5.0 -- -- Typ 28.0 31.0 Max -- -- pF f = 10 MHz Unit Test Conditions
Rev.3.00, Sep.30.2003, page 10 of 18
HD74LV2G123A
Test Circuit
VCC Cext
- +
Rext
Cext = 28 pF or 100 pF or 0.01 F or 0.1 F Rext = 1 k or 2 k or 5 k or 10 k
VCC
Input
See Function Table
Cext Rext/ Cext A B CLR GND
VCC
Q
Output C L = 15 pF or 50 pF
Note : C L includes the probe and jig capacitance.
Rev.3.00, Sep.30.2003, page 11 of 18
HD74LV2G123A
Timing Diagram
t rr A
B CLR
Rext/ Cext Q tw tw t w +t rr
Caution in use In order to prevent any malfunctions due to noise, connect a high frequency performance capacitor between Vcc and GND, and keep the wiring between the External components and Cext, Rext/Cext pins as short as possible. Large values of Cext may cause problems when powering down the HD74LV2G123A because of the amount of energy stored in the capacitor. When a system containing this device is powered down, the capacitor may discharge from Vcc through the protection diodes at pin 7 pin. Current through the input protection diodes must be limited to 20 mA; therefore, the turn-off time of the Vcc power supply must not be faster than t = Vcc * Cext/(20 mA). For example, if Vcc = 5 V and Cext = 22 F, the Vcc supply must turn off no faster than t = (5 V) * (22 F)/ 20 mA = 5.5 ms. This is usually not a problem because power supplies are heavily filtered and cannot discharge at this rate. When a more rapid decrease of Vcc to zero volts occurs, the HD74LV2G123A may sustain damage. To avoid this possibility, use an external calmping diode. The input pins for unused circuit should be used under conditions to fix the outputs to avoid malfunction caused by noises. Also, it's recommended that Rext / Cext terminals are open and external parts are not connected to.
Rev.3.00, Sep.30.2003, page 12 of 18
HD74LV2G123A
* Waveform - 1
90% 50%
tf VCC 10% tr GND
Input A
Input B 10%
90% 50% tr tf 90% 50% 10% t w (L) t PLH (trigger) t PHL tr 90% 50% 10%
VCC GND
Input CLR 10%
90% 50%
VCC GND
VOH Output Q 50% 50% VOL
Rev.3.00, Sep.30.2003, page 13 of 18
HD74LV2G123A
* Waveform - 2
tr 90% 50% 10% tf 90% 50% 10% 10% t w (L) 90% 50% 10%
tf
tr 90% 50% 10% t w (L) tf 90% 50% 90% 50% 10% t w (H) VCC GND VCC GND
Input A
t w (H) tr
Input B
VOH Output Q 50% t w (out) 50% VOL
* Waveform - 3
90% 50%
tf
tr 90% 10% tr 90% 50% 90% 10% 10% t rr tf 90% 50%
tf VCC 10% tr 90% 50% 10% VCC GND VOH GND
Input A
Input B
10%
Output Q
50% t w (out) + t rr
50% VOL
Notes: 1. Input waveform: PRR 1 MHz, Zo = 50 , t r 3 ns, t f 3 ns 2. The output are measured one at a time with one transition per measurement.
Rev.3.00, Sep.30.2003, page 14 of 18
HD74LV2G123A
Application Data
Vcc = 1.8 V 10000.0
tWQ (s) Output pulse width
1000.0
100.0
10.0 Rext 1.0 1 k 10 k 100 k 1 M
2 3 4 5 6 7
0.1 10
10
10
10
10
10
Timing capacitance
Cext (pF)
Vcc = 2.5 V 10000.0
tWQ (s) Output pulse width
1000.0
100.0
10.0 Rext 1.0 1 k 10 k 100 k 1 M
2 3 4 5 6 7
0.1 10
10
10
10
10
10
Timing capacitance
Cext (pF)
Rev.3.00, Sep.30.2003, page 15 of 18
HD74LV2G123A
Vcc = 3.3 V 10000.0
tWQ (s) Output pulse width
1000.0
100.0
10.0 Rext 1.0 1 k 10 k 100 k 1 M
2 3 4 5 6 7
0.1 10
10
10
10
10
10
Timing capacitance
Cext (pF)
Vcc = 5.0 V 10000.0
tWQ (s) Output pulse width
1000.0
100.0
10.0 Rext 1.0 1 k 10 k 100 k 1 M
2 3 4 5 6 7
0.1 10
10
10
10
10
10
Timing capacitance
Cext (pF)
Rev.3.00, Sep.30.2003, page 16 of 18
HD74LV2G123A
Rext = 2 k 1.4 Cext 1.3 1000 pF 10000 pF 100000 pF 1000000 pF
K Coefficient of output pulse width
1.2
1.1
1.0
0.9
0.8 1.5 2.0 2.5 3.0 3.5 4.0 4.5 VCC (V) 5.0 5.5 6.0
Supply voltage
Rext = 10k
1.4
K
Cext
1.3
Coefficient of output pulse width
1000pF 10000pF 100000pF 1000000pF
1.2 1.1 1.0 0.9 0.8 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Supply voltage VCC (V)
Rev.3.00, Sep.30.2003, page 17 of 18
HD74LV2G123A
Package Dimensions
2.0 0.2 1.5 0.2 (0.5) (0.5) (0.5)
Unit: mm
(0.4) 2.3 0.1 3.1 0.3
0 - 0.1
8 - 0.2 - 0.05
+ 0.1
(0.17)
0.7 0.1 (0.4)
Package Code JEDEC JEITA Mass (reference value)
TTP-8DBV 0.010 g
Rev.3.00, Sep.30.2003, page 18 of 18
0.13 - 0.05
+ 0.1
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
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